Implementation of a shared scratch-pad memory with a concept of ownership for multiprocessor architectures.

The project will investigate:

1. Implementation of shared SPM with a ownership concept (probably time-division)
2. Synchronization and support for atomic operations
3. Investigation of possible applications and programming models

The source code for this project can be obtained at henrikh/patmos

• Infrastructure
• Test code for the SSPM

+-----+  +-----+ +-----+
|     |  |     | |     |
| CPU |  | CPU | | CPU |
|     |  |     | |     |
+--+--+  +--+--+ +--+--+
   |        |       |
+--+--------+-------+--+   +----------+
|                      |   |          |
|       Arbiter        +---+ Schedule |
|                      |   |          |
+---------+------------+   +----------+
          |
       +--+---+
       |      |
       | SSPM |
       |      |
       +------+

Drawn using: http://asciiflow.com/

Git

To add changes to next commit:

git add -p

To commit (save the current state in history)

git commit -m "[What ever describes your changes best]"

Push changes to remote server so Henrik can download it.

git push origin

Applications

• Message passing
• Sharing tables and calculations

Instantiation of SSPM

Use the NoC framework and replace the NoC with the scratch-pad memory.

make emulator
make comp APP=sspm
./install/bin/emulator tmp/sspm.elf -v

 make AEGEAN_PLATFORM=default-altde2-115 platform

entity noc is
  port(
    clk	: in std_logic;
    reset	: in std_logic;
    ocp_io_ms	: in ocp_io_m_a;
    supervisor	: in std_logic_vector(2 downto 0);
    ocp_io_ss	: out ocp_io_s_a;
    spm_ports_m	: out mem_if_masters;
    spm_ports_s	: in mem_if_slaves;
    irq	: out std_logic_vector(5 downto 0)
  );

type ocp_io_m_a is array((N*M)-1 downto 0) of ocp_io_m;
type ocp_io_s_a is array((N*M)-1 downto 0) of ocp_io_s;

    type ocp_io_m is record
        MCmd        : std_logic_vector(OCP_CMD_WIDTH-1 downto 0);
        MAddr       : std_logic_vector(OCP_ADDR_WIDTH-1 downto 0);
        MData       : std_logic_vector(OCP_DATA_WIDTH-1 downto 0);
        MByteEn     : std_logic_vector(OCP_BYTE_WIDTH-1 downto 0);
        MRespAccept : std_logic;
    end record;

    type ocp_io_s is record
        SResp       : std_logic_vector(OCP_RESP_WIDTH-1 downto 0);
        SData       : std_logic_vector(OCP_DATA_WIDTH-1 downto 0);
        SCmdAccept  : std_logic;
    end record;

// Signals generated by master
class OcpMasterSignals(addrWidth : Int, dataWidth : Int) extends Bundle() {
  val Cmd = Bits(width = 3)
  val Addr = Bits(width = addrWidth)
  val Data = Bits(width = dataWidth)

// Masters include a RespAccept signal
class OcpIOMasterSignals(addrWidth : Int, dataWidth : Int)
  extends OcpCoreMasterSignals(addrWidth, dataWidth) {
  val RespAccept = Bits(width = 1)

// Register signals that come from master
val masterReg = Reg(init = master.M)
when(masterReg.Cmd === OcpCmd.IDLE || slave.S.CmdAccept === Bits(1)) {
  masterReg := master.M
}
// Forward master signals to slave, always accept responses
slave.M := masterReg
slave.M.RespAccept := Bits("b1")

Instantiation of SSPM Using Python Scripts

Another approach to instantiate the SSPM in the multicore platform is to take advantage of the python scripts used for generating aegean.vhd in the build folder.

Here we are interested in modifying

• aegean/python/codeGen/aegeanCode.py: Contains the functions used to generate the VHDL code in aegean.vhd. We add our own functions, getSSPM() for generating the component code and bindSSPM() for binding an instantiation of the component with other signals. We also add extra signals to the function declareSignals() for use in the binding.
• aegean/python/codeGen/aegeanGen.py: Contains the functions used to generate the verilog code from the Chisel code files in patmos/hardware/src and copy the generated files into aegean.

In order to generate the patmos master and slave cores with the correct IO and support for this, we have to modify the following .xml files.

• aegean/config/ip/ip.xml: This file designates the devices that we add to patmos, and what their offset should be.
• aegean/config/io/dev.xml: This file describes the different devices which can be added to patmos, e.g. Uart and Leds.

Finally, we have to update the makefile /patmos/hardware/Makefile such that when we make the aegean platform, the python functions can properly make our SSPM.

• Added MEMSSPM=io.SSPMMain at the main classes for core.
• Added the following in order to build SSPM

$(HWBUILDDIR)/SSPM.v: $(SRC)
        $(SBT) "run-main $(MEMSSPM) --targetDir $(HWBUILDDIR) --cse --backend v"	

Arbitration

Two options

• Queue
• TDMA

Work journal